Tin oxide transparent thin-film transistors

A SnO2 transparent thin-film transistor (TTFT) is demonstrated. The SnO2 channel layer is deposited by RF magnetron sputtering and then rapid thermal annealed in O2 at 600 ̊C. The TTFT is highly transparent, and enhancement-mode behaviour is achieved by employing a very thin channel layer (10–20 nm). Maximum field-effect mobilities of 0.8 cm2 V−1 s−1 and 2.0 cm2 V−1 s−1 are obtained for enhancementand depletion-mode devices, respectively. The transparent nature and the large drain current on-to-off ratio of 105 associated with the enhancement-mode behaviour of these devices may prove useful for novel gas-sensor applications. The majority of transparent thin-film transistors (TTFTs) reported to date have employed ZnO as a channel material (Carcia et al 2003, Hoffman et al 2003, Masuda et al 2003, Nishi et al 2003, Norris et al 2003, Wager 2003, Hoffman 2004). A notable exception is the high-performance InGaO3(ZnO)5 superlattice TTFT whose single-crystal channel layer can be considered to be composed of alternating layers of InO2 and GaO(ZnO) + 5 (Nomura et al 2003). The purpose of the work reported herein is to demonstrate a new type of TTFT in which the channel layer is SnO2. SnO2 thin-film transistors (TFTs) have been reported previously (Klasens and Koelmans 1964, Aoki and Sasakura 1970, Prins et al 1996, 1997, Wöllenstein et al 2003). All these SnO2 TFTs are depletion-mode devices, requiring the application of a gate voltage to turn them off. Prins et al (1996) fabricated a SnO2 : Sb TFT on a transparent SrTiO3 substrate with a PbZr0.2Ti0.8O3 ferroelectric gate insulator and an opaque SrRuO3 gate. The SnO2 TFT reported by Wöllenstein et al (2003) is noteworthy since the utility of such a device as a novel gas sensor is demonstrated. In contrast to what has been reported previously, the SnO2 TFT reported herein operates as an enhancement-mode device, requiring the application of a gate voltage to turn the device on. Although several strategies were investigated to achieve enhancement-mode operation, as discussed below, our only successful approach was to decrease the channel thickness to approximately 10–20 nm in order to minimize current flow through the ‘bulk’ portion of the channel layer. We believe that the large drain current on-to-off ratio of 105, associated with enhancement-mode operation, and the optical transparency of the SnO2 TTFTs discussed herein offer further advantages for novel gas-sensor applications. Bottom-gate SnO2 TTFTs are fabricated on glass substrates, manufactured by the Nippon Sheet Glass Company, coated with 200 nm sputtered indium tin oxide (ITO) and a 220 nm atomic layer deposited superlattice of Al2O3 and TiO2 (ATO)3. The ITO and ATO layers constitute the gate contact and insulator, respectively. Typically, the channel layer is deposited by RF magnetron sputtering using a tin oxide target (Cerac) in Ar/O2 (97%/3%) at a pressure of 5 m Torr, power density of ∼3 W cm−2, target-to-substrate distance of ∼7.5 cm, and no intentional substrate heating. The channel layers are typically 10–20 nm thick. The channel length and width are 1524μm and 7620μm, respectively. Alternatively, SnO2 channel layers are formed either by thermal evaporation at a pressure of∼10−6 Torr or by activated reactive evaporation in either microwave-activated O2 or N2 at a pressure of ∼5 × 10−4 Torr. In both cases, SnO2 powder is used as the evaporation source material. After deposition of the SnO2 channel layer the sample is annealed, typically via furnace or rapid thermal annealing (RTA) in O2 at 600 ̊C. Finally, ITO source and drain contacts are formed by ion-beam sputtering. Figure 1 displays the dc drain-current–drain-voltage (IDS–VDS) characteristics for a SnO2 TTFT. The slopes of most 3 ITO/ATO glass was supplied by Arto Pakkala, Planar Systems, Inc. Espoo, Finland, arto [email protected]. 0022-3727/04/202810+04$30.00 © 2004 IOP Publishing Ltd Printed in the UK 2810 Tin oxide transparent thin-film transistors of the IDS curves shown in figure 1 are extremely flat at large VDS, indicating that a condition of ‘hard saturation’ is achieved, due to complete pinch-off of the channel. However, the two uppermost IDS curves exhibit a small slope since the condition for pinch-off, i.e. VDS VGS − VT (where VT is the threshold voltage), is not achieved. It is evident from figure 1 that the TTFT is essentially off, at least with respect to the 90μA scale used for this figure. This implies enhancement-mode behaviour (i.e. negligible current flows at zero gate voltage; a positive gate voltage is required to turn on the drain current). A positive threshold voltage, VT 10 V, is obtained from extrapolation of the linear portion of the dc draincurrent–gate-voltage (IDS–VGS) characteristic, as shown in the insert in figure 2, indicating this to be an enhancement-mode device. However, as evident from the log(IDS)–VGS transfer 0 10 15 20 25 30 35 40 5 VDS (V) –10 10 30 50 70 90